Simulation & design of a VLSI embedded system using Verilog Coding with Modelsim approach in FPGA scenarios for AI appications in automotive sectors

Abstract

In modern systems, versatility, efficiency, and cost-effectiveness are paramount. A system should optimize its resource utilization and offer programmability to dynamically adjust its functionalities as needed. Software-based design provides this flexibility, explaining the growing popularity of software-based design systems. In a world marked by rapid innovations, having tools that enable precise modeling is crucial for reducing design time and obtaining comprehensive data on static and dynamic parameters. Programming languages like VHDL (VHSIC Hardware Description Language) and Verilog serve as robust platforms for design simulation and testing, forming the foundation for ASIC/FPGA-based design. VHDL, initially developed for Very High-Speed Integrated Circuits (VHSIC), excels at describing the behavior & the structures of the electrical electronical systems, particularly digital hardware designs like ASICs, FPGAs, and conventional digital circuits. While Verilog is another popular tool, we chose VHDL due to our greater familiarity and comfort withinit. Field type of Programmable Gated Array [FPGAs] present an alternatives to Programmable Logic based Devices [PLDs] & ASICs. As the name suggests, FPGA’s offer a significant advantage in terms of programmability. Unlike their PLD predecessors, FPGAs can typically be reprogrammed multiple times, allowing designer multiple opportunities to modify their circuits.  To execute our project, we opted for VHDL as the Hardware Description Language (HDL), used Xilinx ISEs 6.1 for synthesis’, & employed ModelSims for VHDL code simulation. These choices were made to leverage VHDL's capabilities, and the selected tools facilitated seamless integration and simulation of our VHDL codes.